Electric pulse induced impedance and material degradation in IC chip packaging
نویسندگان
چکیده
A method for measurement of electric circuit conduction path by Scan Electron Microscopy (SEM) has been developed. It shows that current conducts through the whole surface layer of solder joints when subjected to high frequency pulse loadings, but only half of the surface layer when subjected to AC loading. The Electrical Pulse Induced Resistance Change (EPIR) profile of a symmetric solder bump thin film structure of a typical IC chips packaging is studied. EPIR is found to be frequency, duty factor and current density dependent. An average current density model is proposed to approximate duty factor and the current density induced EPIR effects. [
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